A leading semiconductor solutions provider in Provence-Alpes-Côte dAzur is seeking a Cache Coherency Architect to design high-performance cache coherency solutions. This role involves collaboration with hardware, software, and verification teams to optimize system integration and performance. The ideal candidate has
Overview Arteris is seeking a Cache Coherency Architect to define and optimize cache coherency solutions within Arteris advanced NoC IP portfolio. You will collaborate with hardware designers, verification engineers, software developers, and other stakeholders to create high-performance, power-efficient, and reliable
Description Do you want to contribute to the backbone of some of the world’s most popular SoCs? Do you want to contribute to the backbone of some of the world’s most popular SoCs? Arteris enables engineering
System Performance Analysis Engineer Job Description Would you like to investigate performance bottlenecks and contribute to the optimization of future Arm-based System-on-Chips? Are you interested in understanding how CPUs, interconnects, memory systems and I/O components interact
Product Engineer H/F Paris Fance Arteris connecte l’innovation Arteris permet aux équipes d’ingénierie et de conception des entreprises les plus innovantes au monde de connecter et d’intégrer les systèmes sur puce (SoC) qui alimentent les innovations
Company:Qualcomm France S.A.R.L. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Qualcomm France-QITCs mission is to develop and deploy highly configurable custom-built interconnect hardware IPs (NoCs), software tools, and exploration and verification methodologies. This enables
Company:Qualcomm France S.A.R.L. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: The QITC mission is to develop and deploy custom-built interconnect hardware IPs, software tools, and exploration and verification methodologies so that SoC integration teams
Company:Qualcomm France S.A.R.L. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: The QITC mission is to develop and deploy custom-built interconnect hardware IPs, software tools, and exploration and verification methodologies so that SoC integration teams
Meet Arago and the Aragonians Arago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors.
Arteris is seeking a Cache Coherency Architect to define and optimize cache coherency solutions within our NoC IP portfolio. You will develop cutting-edge cache coherent interconnect IP for seamless integration with other NoC IP and system IP, enabling efficient communication across
Company: Qualcomm France S.A.R.L. Job Area Engineering Group, Engineering Group ASICS Engineering General Summary The QITC mission is to develop and deploy custom-built interconnect hardware IPs, software tools, and exploration and verification methodologies so that SoC
Company: Qualcomm France S.A.R.L. Job Area: Engineering Group, Engineering Group ASICS Engineering General Summary: The QITC mission is to develop and deploy custom-built interconnect hardware IPs, software tools, and exploration and verification methodologies so that SoC
We are seeking an experienced SoC Interconnect Technology Team Lead to drive the architecture, design, and execution of next‑generation coherent and non‑coherent interconnect solutions for advanced SoCs. This role requires deep expertise in scalable interconnect fabrics
Join NanoXplore and Shape the Future of FPGA and SoC Innovation ! Join a fast-growing European semiconductor leader and play a direct role in strengthening technological sovereignty through the development of advanced FPGA and SoC solutions
Overview Qualcomm France-SARL’s mission is to develop and deploy configurable custom-built interconnect hardware IPs (NoCs), software tools, and verification methodologies to enable SoC integration teams to assemble and verify SoCs with desired Power Performance Area (PPA)
Company: Qualcomm France S.A.R.L. Job Area: Engineering Group, Engineering Group ASICS Engineering General Summary: The QITC mission is to develop and deploy custom-built interconnect hardware IPs, software tools, and exploration and verification methodologies so that SoC
Kalray is a European leader in hardware acceleration, with full-stack acceleration expertise: from silicon to complete system. Our MPPA® (Massively Parallel Processor Array) architecture is the foundation of Kalray’s processor (30+ patent families, 15+ years of
Company Qualcomm France S.A.R.L. Job Area Engineering Group, Engineering Group ASICS Engineering General Summary The QITC mission is to develop and deploy custom-built interconnect hardware IPs, software tools, and exploration and verification methodologies so that SoC