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Role Overview In this role, you will lead the architecture, design, and implementation of digital memory chips that combine digital, logic, NVM analog circuitry, and high‑speed interfaces. You will be involved throughout the full development cycle,
Our client is looking for a Principal Engineer – High-Speed SerDes System Architect to lead next-gen high-speed wireline electrical communication research within the High‑Speed High‑Frequency team in the Board Engineering Lab at Grenoble Research Center, collaborating closely
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